Huawei’s “Tao Law”: A Comprehensive Overview of Core Companies

On May 25, 2026, He Tingbo, Director of Huawei and President of its Semiconductor Business Unit, officially proposed the Tao (τ) Law at ISCAS 2026. This marks China’s first globally recognized guiding principle for semiconductor industry development.

1. τ (tau, pronounced “Tao”) represents the time constant in circuit theory—the time required for a signal to transition from one state to another. A smaller τ means faster circuit switching.

Traditional Moore’s Law focuses on continuously shrinking transistor dimensions (geometric scaling).

The Tao Law shifts focus to temporal scaling: continuously compressing signal propagation delay without relying on extreme linewidths.

2. Core Implementation Path—Logic Folding

Traditional chip circuit layouts are two-dimensional, requiring long horizontal signal routing. Logic folding extends circuit layout from a single layer to multi-layer stacking, “folding” critical paths vertically and replacing long planar interconnects with short vertical interconnects—thereby significantly reducing the time constant τ.

3. Achievements and Targets

Over the past six years, Huawei has designed and mass-produced 381 chips compliant with the Tao Law.

Huawei plans to launch its Kirin chip featuring logic folding technology in autumn 2026.

By 2031, high-end chips based on the Tao Law are expected to achieve performance equivalent to a 1.4-nanometer process node.

Below is a list of companies related to Huawei’s Tao Law. We recommend liking and saving this article for future reference. The content herein serves solely for logical interpretation and informational reference—not as investment advice. Follow me for daily analysis of core market themes and their underlying logic.

(I) EDA Design Software

The Tao Law requires circuit-level optimization of transistors and interconnect layouts to compress the time constant τ; EDA tools span the entire chip design, simulation, and verification workflow. Huawei’s 381 mass-produced chips necessarily rely on a mature, full-flow domestic EDA tool ecosystem. The following companies hold key positions in the EDA domain:

1. Beijing Boa Technology (HuaDa Jiutian)

Leading A-share EDA vendor by market share (~6% domestically), and currently the largest and most comprehensive EDA company in China. It offers full-flow EDA tools for analog circuit design, digital circuit design, and other capabilities—providing foundational support for circuit-level optimization required by the Tao Law.

2. Primarius Electronics

Second-largest EDA vendor among A-share companies; core strength lies in device modeling and verification EDA tools. Its complete toolchain covers device modeling, circuit simulation, and yield analysis. Given the Tao Law’s stringent requirements for fine-grained RC optimization of transistor interconnects, Primarius’ device-level physical modeling capability can directly integrate into Huawei’s chip design flow.

3. Grandis Microelectronics

Third-largest EDA vendor among A-share companies; specializes in EDA tools for manufacturing—particularly yield enhancement and test-chip design. Its yield-boosting solutions serve as a vital bridge between foundries and fabless design houses. As logic folding moves toward mass production, yield ramp-up will heavily depend on yield-management EDA tools like those offered by Grandis.

4. Shanghai Shentong Metro Group

Indirectly holds ~7.58% equity in HuaDa Jiutian via its subsidiary Jianyuan Fund. Though not a pure-play EDA company, Shanghai Shentong Metro Group is a major shareholder of HuaDa Jiutian—and thus stands to benefit from valuation uplifts in domestic EDA stocks driven by the Tao Law.

5. Anlogic Corporation

Self-developed full-flow FPGA-specific EDA software—TangDynasty. FPGA EDA tools are extremely complex; Anlogic is among the few domestic firms capable of delivering end-to-end tools covering logic synthesis through placement-and-routing. Since the Tao Law emphasizes architectural innovation—and FPGAs are indispensable for verification and prototyping—Anlogic’s EDA tools will indirectly benefit from Huawei’s growing demand for domestic FPGAs and associated toolchains.

6. Sway Semiconductor

Invested in Qingdao Zhancheng Technology (4.67% stake), a provider of IC design EDA tools focused on physical verification and layout. While Sway itself is a MEMS foundry, its EDA investment forms a synergistic loop between manufacturing and tool development.

7. Fudan Microelectronics Group

Developed full-flow, self-owned FPGA-supporting EDA tools compatible with its proprietary FPGA products. A leader in China’s high-reliability FPGA market, its EDA tools have undergone extensive internal validation. As logic folding design may be first deployed in FPGA chips, Fudan Microelectronics’ integrated hardware-software capability stands to benefit.

8. Zhangjiang Hi-Tech

As the developer of Zhangjiang Science City, it participates in investments in the Shanghai EDA Innovation Center, aiming to build a full-flow domestic EDA ecosystem. Though not directly engaged in EDA development, Zhangjiang Hi-Tech benefits from regional industrial agglomeration and platform-level investment logic.

9. Taicheng Semiconductor

Develops and procures EDA software for high-power semiconductor product design. While its core business centers on power semiconductors—distinct from advanced logic chip EDA markets—the Tao Law’s “architecture-over-process” philosophy may extend to power devices, making Taicheng’s in-house EDA capability a key differentiator.

10. Hygine Space

Built its own IC EDA design platform, primarily used for autonomous design of aerospace-grade chips. With deep expertise in high-reliability, radiation-hardened chips, its self-built EDA platform reflects strong demand for design-tool autonomy—a philosophy fully aligned with the Tao Law’s emphasis on indigenous innovation.

11. Honyou Technology

Has invested in Zhongke Yihaiwei Microelectronics, whose team developed EDA tools supporting its FPGA products. Through this investment, Honyou Technology indirectly acquires FPGA EDA capability—offering thematic elasticity amid the broader domestic substitution trend.

12. Guangdong Electric Power A

Its subsidiary Shenzhen Capital Group (SCGC) previously invested in HuaDa Jiutian. Guangdong Electric Power A holds an extremely indirect stake in HuaDa Jiutian through multiple layers of ownership—making it a marginal beneficiary with limited upside elasticity.

(II) Chiplet & Advanced Packaging

Logic folding upgrades circuit layout from a single-layer planar structure to a multi-layer stacked architecture—essentially achieving vertical short-distance interconnects via 3D packaging. This creates rigid demand for advanced packaging technologies: multi-die stacking, through-silicon vias (TSV), hybrid bonding, and more. The following companies are core participants in domestic advanced packaging and Chiplet technologies:

1. Tongfu Microelectronics

Top-ranked domestic player in advanced packaging technology; already mass-producing Chiplet-based CPUs/GPUs for AMD. Possesses a complete 2.5D/3D packaging platform—including TSV, fan-out, and hybrid bonding processes. As AMD is the most commercially successful Chiplet benchmark, Tongfu—its key OSAT partner—has validated the full path from technical readiness to volume production, positioning it best to meet Huawei’s logic folding chip packaging needs.

2. JCET Group

Second-ranked domestic player in advanced packaging technology; already mass-producing various advanced packaging products (e.g., SiP, fan-out, WLCSP). Ranked third globally among OSATs, JCET enjoys clear scale advantages. Though its current Chiplet order volume lags behind Tongfu, its massive capacity and broad customer base enable rapid catch-up.

3. Huatian Technology

Third-ranked domestic player in advanced packaging technology; has achieved mass production of advanced packaging products. Specializes in high-density packaging with presence across flip-chip (FC), TSV, and SiP domains. Huatian’s strengths in cost control and customer responsiveness position it well to capture a share of logic folding-related packaging orders once the technology matures.

4. Yongsi Electronics

Nearly 100% of its revenue comes from advanced packaging—making it a pure-play advanced packaging firm. Focused on high-end packaging, its product portfolio includes QFN, BGA, and SiP. Due to its small size and high business purity, Yongsi often exhibits greater earnings elasticity within the Tao Law theme.

5. Cambricon Technologies

Its cloud AI chip, MLU370, already adopts Chiplet architecture—representing a landmark commercial deployment of Chiplets in domestic chips. Though Cambricon is an AI chip design house—not directly involved in packaging—its successful Chiplet implementation validates the technical feasibility of this approach. The Tao Law will further accelerate Chiplet adoption in AI chips, granting Cambricon first-mover advantage in design methodology.

6. VeriSilicon Holdings

Offers high-end application processor platforms built on Chiplet architecture. As a chip design services (IP and platform) company, VeriSilicon maintains a rich Chiplet IP library and robust system integration capability. Multi-layer stacking under the Tao Law will increase demand for Chiplet design methodologies, interface IPs, and on-chip networks (NoC)—potentially boosting VeriSilicon’s licensing revenue.

7. Blue Arrow Electronics

Offers packaging formats including DNF, PDFN, and QFN—with QFN representing a foundational type in advanced packaging. Its technical capabilities place it among mainstream domestic players, benefiting from overall semiconductor OSAT sector recovery and domestic substitution trends.

8. ZZZH Co., Ltd.

Specializes in backend semiconductor advanced packaging equipment—including die bonders and sorters. Equipment suppliers are among the earliest beneficiaries during advanced packaging capacity expansion cycles.

9. Dagang Holding

Its subsidiary Suzhou Keyo Optoelectronics possesses advanced packaging expertise—mainly in wafer-level packaging and TSV. Currently still in the technology accumulation and market expansion phase.

10. Suzhou Good-Ark Electronics

Engaged in advanced packaging via investments and subsidiaries; technology remains in the accumulation stage. Core business focuses on discrete semiconductor devices.

11. Sanjia Technology

Involved in semiconductor packaging molds and equipment; still accumulating technical expertise in advanced packaging.

(III) Foundry Manufacturing

Compressing the time constant τ depends not only on circuit design but also on device-level optimization—transistor structures, interconnect materials, and process parameters. These optimizations must ultimately be implemented within foundry process platforms and design rules. Moreover, Huawei’s logic folding Kirin chip—slated for release in autumn 2026—must be taped out and mass-produced by a foundry. All major domestic foundries stand to compete for this historic order:

1. SMIC

Undisputed leader in mainland China’s foundry sector—and ranked fourth globally and first domestically. Maintains mature 14nm and enhanced process nodes, along with FinFET advanced-node capability. Since the Tao Law’s logic folding is fundamentally a design-process co-optimization strategy, SMIC—as China’s most technically advanced foundry—is best positioned to become Huawei’s primary supplier for its next-generation Kirin chips. SMIC also benefits from overall capacity relocation trends across China’s domestic chip supply chain.

2. Hua Hong Group

Ranked sixth globally and second domestically in foundry services, with distinctive strengths in power devices, analog chips, and embedded non-volatile memory. Though trailing SMIC in leading-edge process capability, Hua Hong boasts deep expertise in specialty processes. As logic folding does not inherently require 5nm/3nm extreme linewidths, Hua Hong’s mature nodes combined with innovative 3D stacking could make it eligible for Huawei’s edge-computing or IoT chip foundry needs.

3. Neo Semiconductor

Ranked ninth globally and third domestically in foundry services; mainly produces display driver ICs (DDIC) and MCUs. Its technology nodes center on mature 40nm–90nm processes. Although it lacks cutting-edge logic foundry capabilities, Neo stands to gain increased mature-node orders from domestic fabless companies amid the Tao Law-driven full-chain domestication initiative.

4. Yandong Microelectronics

Specializes in discrete devices, analog ICs, and specialty IC foundry services—with annual revenue of ~RMB 2.056 billion. Its products target high-reliability and industrial-control applications. The Tao Law’s ripple effects may extend to analog/mixed-signal chip design methodologies, enabling Yandong—specializing in specialty IC foundry—to benefit from broader domestic substitution trends.

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